Many existing methods of manufacturing MEMS devices use a layer of silicon heavily doped with boron atoms. Because the heavily doped silicon dissolves much more slowly during the etching process than undoped silicon, the heavily doped silicon yields greater control of the effect of the etching process.
During the doping process, boron atoms are added to the crystal lattice of the silicon layer. When the boron atoms are added to the silicon crystal lattice structure, the smaller boron atoms replace larger silicon atoms in the structure. This causes structural stress in the crystal lattice structure. The amount of structural stress increases with the thickness of the layer of heavily doped silicon. MEMS devices typically require a thick epitaxial layer, in some cases greater than 20 μm.
Sometimes, when manufacturing wafers with a large epitaxial layer thickness, certain problems are caused by the high structural stress of the heavily doped silicon layer. For instance, the structural stress created in the heavily boron doped silicon layer by the smaller size of the boron atoms may cause the wafer to bow or warp as the crystal lattice structure of the doped silicon layer attempts to align with the lattice structure of the undoped wafer. This may cause the wafer to become disfigured and unsuitable for use. Because the structural stress of the heavily doped silicon layer increases with the thickness of the heavily doped silicon layer, there is an upper limit on the thickness of the epitaxial layer that may be used to fabricate these wafers; namely, the thickness at which the amount of warping caused by the structural stress is small enough that the wafers remain within the manufacturing tolerance requirements of the MEMS sensors.
However, certain types of MEMS devices, such as gyroscopic sensors, require an epitaxial thickness greater than the epitaxial layer thicknesses that are able to be produced by traditional methods without experiencing the warping problem discussed above. Current methods of minimizing the warping of the wafers in order to be able to manufacture an acceptable semiconductor circuit that requires a thick epitaxial layer are expensive and time-consuming.
One such method for manufacturing wafers with a large epitaxial layer thickness is to deposit a second epitaxial layer on the backside of a wafer to balance the stress. However, the process of adding the backside epitaxial layer involves added cost and materials, and requires additional time to manufacture. Further, even using this method there remains an upper limit to the thickness of the epitaxial layer that may be produced.
Another method for manufacturing wafers with a large epitaxial layer thickness is to deposit germanium atoms in the doped epitaxial layer. Because the germanium atoms are larger in size than the silicon atoms, the larger size of the germanium atoms reduces the stress in the epitaxial layer caused by the smaller boron atoms. However, this process requires additional time to produce the wafers, the addition of another element, germanium, and yet the problems of bowing and warping of the wafers remain difficult to control. Further, even using this method there remains an upper limit to the thickness of the epitaxial layer that may be produced.
Thus, the cost of wafers manufactured by adding a backside epitaxial layer is significantly higher than those wafers that do not require a large epitaxial thickness and do not require depositing a backside epitaxial layer.
An additional problem encountered when manufacturing MEMS devices with heavily doped epitaxial layer is curl. Any nonuniformities in the epitaxial layer may cause the wafer to curl when released from the silicon substrate on which the wafer is built. These nonuniformities are not well-understood or easily controlled. Excessive curl in the epitaxial layer may cause the wafer to be unsuitable for use, as distortions in the physical shape of the MEMS device cause the quality of the sensor to degrade. This adds additional cost to the manufacturing process in that the defective wafers must be identified and removed from the batch of wafers that meet manufacturing specifications.
Therefore, there is a need for an improved method of manufacturing MEMS devices that require a thick epitaxial layer.